SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 57
SDA5523
Manufacturer Part Number
SDA5523
Description
SDA55xx TVText Pro
Manufacturer
Micronas Semiconductor
Datasheet
1.SDA5523.pdf
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DATA SHEET
2.8.3.12. Counter Stop
The counter can be stopped any time by resetting the
RUN bit. If the counter is stopped and started again
(reset and set the RUN bit), the counter reloads with
the RELOAD value and reset the OV bit.
2.8.4. Idle and Power-down Mode
In idle mode the Capture Reload Timer CRT continues
to function normally, unless it has been explicitly shut
down via the PSAVEX (PERI) bit.
In power down mode the Capture Reload Timer CRT is
shut off.
Table 2–33: Related registers
Micronas
Register Name
CRT_rell
CRT_relh
CRT_capl
CRT_caph
CRT_mincapl
CRT_mincaph
CRT_con0
CRT_con1
See Section 3. on page 110 for detailed register description.
7
OV
Reserved
6
PR
Reserved
5
PLG
Reserved
Sept. 10, 2004; 6251-556-3DS
4
REL
Reserved
2.8.5. Registers
The CRT_rell and CRT_relh are the reload registers
(SFR address B7
CRT_capl are the corresponding capture registers
(SFR address BA
CRT_mincaph (SFR Address BC
mum
CRT_con1 are the control registers.
CapH[7:0]
Bit Name
CapL[7:0]
RelH[7:0]
RelL[7:0]
MinL[7:0]
[7:0]
capture
3
RUN
Reserved
registers.
H
H
2
RISE
PR1
and BB
and B9
CRT_con0
H
). CRT_mincapl and
1
FALL
First
H
), CRT_caph and
H
SDA 55xx
, BD
H
(E5
) are mini-
0
SEL
Start
H
)
and
57
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