SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 54

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
2.7.3. Configuring the Timer/Counter Input
The use of the timer/counter is determined by two 8-bit
registers, TMOD (timer mode) and TCON (timer con-
trol). The input to the counter circuitry is from an exter-
nal reference (for use as a counter), or from the on-
chip oscillator (for use as a timer). The operation mode
depends on whether TMOD's C/T-bit is set or cleared,
respectively. When used as a time base, the on-chip
oscillator frequency is divided by twelve or six before
being used as the counter input. When TMOD's GATE
bit is set (1), the external reference input (T1, T0) or
the oscillator input is gated to the counter conditional
upon a second external input (INT0) or (INT1) being
high. When the GATE bit is zero (0), the external refer-
ence, or oscillator input, is unconditionally enabled. In
either case, the normal interrupt function of INT0 and
INT1 is not affected by the counter's operation. If
enabled, an interrupt will occur when the input at INT0
or INT1 is low. The counters are enabled for incre-
menting when TCON's TR1 and TR0 bits are set.
When the counters overflow, the TF1 and TF0 bits in
TCON get set, and interrupt requests are generated.
The counter circuitry counts up to all 1's and then over-
flows to either 0's or the reload value. Upon overflow,
TF1 or TF0 is set. When an instruction changes the
timer's mode or alters its control bits, the actual
change occurs at the end of the instruction's execution.
2.7.4. Timer/Counter Mode Register
Table 2–30: TMOD
Table 2–31: TCON
54
Register Name
TMOD
See Section 3. on page 110 for detailed register description.
Register Name
TCON
See Section 3. on page 110 for detailed register description.
7
GATE
7
TF1
6
C/T
6
TR1
Timer 1
5
M1
5
TF0
Sept. 10, 2004; 6251-556-3DS
4
M0
4
TR0
Bit Name
Bit Name
3
GATE
3
IE1
2
C/T
2
IT1
Timer 0
1
M1
1
IE0
DATA SHEET
0
M0
0
IT0
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