HD6433935 Hitachi, HD6433935 Datasheet - Page 81

• Manufacturer Part Number: HD6433935
• Description: 8-Bit MICROCONTROLLER
• Manufacturer: Hitachi

Bits 4 to 0: IRQ
Bit n
IRRIn
0
1
Note: IRQ
5. Interrupt request register 2 (IRR2)
IRR2 is an 8-bit read/write register, in which a corresponding flag is set to 1 when a direct
transfer, A/D converter, Timer G, Timer FH, Timer FC, or Timer C interrupt is requested. The
flags are not cleared automatically when an interrupt is accepted. It is necessary to write 0 to clear
each flag.
Bit 7: Direct transfer interrupt request flag (IRRDT)
Bit 7
IRRDT
0
1
Bit
Initial value
Read/Write
Note: * Only a write of 0 for flag clearing is possible
the chip.
0
is an internal signal that performs interfacing to the FLEX™ decoder incorporated in
Description
Clearing conditions:
When IRRIn = 1, it is cleared by writing 0
Setting conditions:
When pin IRQn is designated for interrupt input and the designated
signal edge is input
Description
Clearing conditions:
When IRRDT = 1, it is cleared by writing 0
Setting conditions:
When a direct transfer is made by executing a SLEEP instruction
while DTON = 1 in SYSCR2
4
to IRQ
R/(W) *
IRRDT
7
0
0
interrupt request flags (IRRI4 to IRRI0)
IRRAD
R/(W) *
6
0
R/W
—
5
0
IRRTG
R/(W) *
4
0
IRRTFH
R/(W) *
3
0
IRRTFL
R/(W) *
2
0
R/(W) *
IRRTC
1
0
(initial value)
(initial value)
(n = 4 to 0)
IRREC
R/(W) *
0
0
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