HD6433935 Hitachi, HD6433935 Datasheet - Page 112

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HD6433935

Manufacturer Part Number
HD6433935
Description
8-Bit MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
Bits 1 and 0: Active (medium-speed) mode clock select (MA1, MA0)
Bits 1 and 0 choose ø
(medium-speed) mode and sleep (medium-speed) mode. MA1 and MA0 should be written in
active (high-speed) mode or subactive mode.
Bit 1
MA1
0
0
1
1
2. System control register 2 (SYSCR2)
SYSCR2 is an 8-bit read/write register for power-down mode control.
Bits 7 to 5: Reserved bits
These bits are reserved; they are always read as 1, and cannot be modified.
Bit 4: Noise elimination sampling frequency select (NESEL)
This bit selects the frequency at which the watch clock signal (ø
generator is sampled, in relation to the oscillator clock (ø
generator. When ø
Bit 4
NESEL
0
1
100
Bit
Initial value
Read/Write
Bit 0
MA0
0
1
0
1
Description
Sampling rate is ø
Sampling rate is ø
OSC
7
1
OSC
Description
ø
ø
ø
ø
= 6 to 10 MHz, clear NESEL to 0.
OSC
OSC
OSC
OSC
/128, ø
/16
/32
/64
/128
6
1
OSC
OSC
OSC
/64, ø
/16
/4
OSC
5
1
/32, or ø
NESEL
R/W
4
1
OSC
/16 as the operating clock in active
OSC
DTON
R/W
) generated by the system clock pulse
3
0
W
) generated by the subclock pulse
MSON
R/W
2
0
SA1
R/W
1
0
(initial value)
(initial value)
R/W
SA0
0
0

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