HD6433935 Hitachi, HD6433935 Datasheet - Page 32
HD6433935
Manufacturer Part Number
HD6433935
Description
8-Bit MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6433935.pdf
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2.4
2.4.1
The H8/300L CPU supports the eight addressing modes listed in table 2-1. Each instruction uses a
subset of these addressing modes.
Table 2-1
No.
1
2
3
4
5
6
7
8
1. Register Direct—Rn: The register field of the instruction specifies an 8- or 16-bit general
2. Register Indirect—@Rn: The register field of the instruction specifies a 16-bit general
3. Register Indirect with Displacement—@(d:16, Rn): The instruction has a second word
4. Register Indirect with Post-Increment or Pre-Decrement—@Rn+ or @–Rn:
20
register containing the operand.
Only the MOV.W, ADD.W, SUB.W, CMP.W, ADDS, SUBS, MULXU (8 bits
DIVXU (16 bits ÷ 8 bits) instructions have 16-bit operands.
register containing the address of the operand in memory.
(bytes 3 and 4) containing a displacement which is added to the contents of the specified
general register to obtain the operand address in memory.
This mode is used only in MOV instructions. For the MOV.W instruction, the resulting address
must be even.
Register indirect with post-increment—@Rn+
The @Rn+ mode is used with MOV instructions that load registers from memory.
Addressing Modes
Addressing Modes
Addressing Modes
Address Modes
Register direct
Register indirect
Register indirect with displacement
Register indirect with post-increment
Register indirect with pre-decrement
Absolute address
Immediate
Program-counter relative
Memory indirect
Symbol
Rn
@Rn
@(d:16, Rn)
@Rn+
@–Rn
@aa:8 or @aa:16
#xx:8 or #xx:16
@(d:8, PC)
@@aa:8
8 bits), and
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