ATMEGA163 ATMEL [ATMEL Corporation], ATMEGA163 Datasheet - Page 67

• Manufacturer Part Number: ATMEGA163
• Description: 8-bit Microcontroller with 16K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Data Modes
SPI Control Register – SPCR
1142E–AVR–02/03
When the SPI is configured as a Slave, the SS pin is always input. When SS is held low,
the SPI is activated, and MISO becomes an output if configured so by the user. All other
pins are inputs. When SS is driven high, all pins are inputs, and the SPI is passive,
which means that it will not receive incoming data. Note that the SPI logic will be Reset
once the SS pin is driven high. If the SS pin is driven high during a transmission, the SPI
will stop sending and receiving immediately and both data received and data sent must
be considered as lost.
There are four combinations of SCK phase and polarity with respect to serial data,
which are determined by control bits CPHA and CPOL. The SPI data transfer formats
are shown in Figure 43 and Figure 44.
Figure 43. SPI Transfer Format with CPHA = 0 and DORD = 0
Figure 44. SPI Transfer Format with CPHA = 1 and DORD = 0
• Bit 7 – SPIE: SPI Interrupt Enable
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set
and the if the Global Interrupt Enable bit in SREG is set.
• Bit 6 – SPE: SPI Enable
When the SPE bit is set (one), the SPI is enabled. This bit must be set to enable any SPI
operations.
Bit
$0D ($2D)
Read/Write
Initial Value
SPIE
R/W
7
0
SPE
R/W
6
0
DORD
R/W
5
0
MSTR
R/W
4
0
CPOL
R/W
3
0
CPHA
R/W
2
0
ATmega163(L)
SPR1
R/W
1
0
SPR0
R/W
0
0
SPCR
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