ATMEGA163 ATMEL [ATMEL Corporation], ATMEGA163 Datasheet - Page 42

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ATMEGA163

Manufacturer Part Number
ATMEGA163
Description
8-bit Microcontroller with 16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Timer/Counter 0 – TCNT0
16-bit Timer/Counter1
42
ATmega163(L)
The Timer/Counter0 is implemented as an up-counter with read and write access. If the
Timer/Counter0 is written and a clock source is present, the Timer/Counter0 continues
counting in the clock cycle following the write operation.
Figure 33 shows the block diagram for Timer/Counter1.
Figure 33. Timer/Counter1 Block Diagram
The 16-bit Timer/Counter1 can select clock source from CK, prescaled CK, or an exter-
nal pin. In addition it can be stopped as described in section “Timer/Counter1 Control
Register B – TCCR1B” on page 45. The different Status Flags (Overflow, Compare
Match, and Capture Event) are found in the Timer/Counter Interrupt Flag Register –
TIFR. Control signals are found in the Timer/Counter1 Control Registers – TCCR1A and
TCCR1B. The interrupt enable/disable settings for Timer/Counter1 are found in the
Timer/Counter Interrupt Mask Register – TIMSK.
When Timer/Counter1 is externally clocked, the external signal is synchronized with the
Oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
Bit
$34 ($54)
Read/Write
Initial Value
15
15
15
15
TIMER/COUNTER1 OUTPUT COMPARE REGISTER A
REGISTER (TIMSK)
TIMER INT. MASK
T/C1 INPUT CAPTURE REGISTER (ICR1)
MSB
R/W
7
0
T/C1 OVER-
FLOW IRQ
TIMER/COUNTER1 (TCNT1)
16 BIT COMPARATOR
R/W
6
0
8
8
8
8
T/C1 COMPARE
7
7
7
7
MATCH A IRQ
REGISTER (TIFR)
TIMER INT. FLAG
R/W
5
0
CAPTURE
TRIGGER
T/C1 COMPARE
MATCH B IRQ
R/W
4
0
0
0
0
0
REGISTER A (TCCR1A)
15
15
TIMER/COUNTER1 OUTPUT COMPARE REGISTER B
R/W
T/C CLEAR
T/C CLOCK SOURCE
UP/DOWN
CAPTURE IRQ
T/C1 CONTROL
3
0
T/C1 INPUT
R/W
2
0
16 BIT COMPARATOR
CONTROL
8
8
LOGIC
7
7
R/W
REGISTER B (TCCR1B)
1
0
T/C1 CONTROL
LSB
R/W
0
0
1142E–AVR–02/03
0
0
TCNT0
CK
T1

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