ATMEGA163 ATMEL [ATMEL Corporation], ATMEGA163 Datasheet - Page 50

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ATMEGA163

Manufacturer Part Number
ATMEGA163
Description
8-bit Microcontroller with 16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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50
ATmega163(L)
Figure 35. Effects of Unsynchronized OCR1 Latching.
Figure 36. Effects of Unsynchronized OCR1 Latching in Overflow Mode.
During the time between the write and the latch operation, a read from OCR1A or
OCR1B will read the contents of the temporary location. This means that the most
recently written value always will read out of OCR1A/B.
When the OCR1X contains $0000 or TOP, and the up/down PWM mode is selected, the
output OC1A/OC1B is updated to low or high on the next Compare Match according to
the settings of COM1A1/COM1A0 or COM1B1/COM1B0. This is shown in Table 18. In
overflow PWM mode, the output OC1A/OC1B is held low or high only when the Output
Compare Register contains TOP.
Table 18. PWM Outputs OCR1X = $0000 or TOP
Note:
COM1X1
Note: x = A or B
1. X = A or B
1
1
1
1
Note: X = A or B
Unsynchronized OC1x Latch
Synchronized OC1x Latch
Synchronized OC1x Latch
Unsynchronized OC1x Latch
COM1X0
0
0
1
1
OCR1X
$0000
$0000
TOP
TOP
(1)
PWM Output OC1x
PWM Output OC1x
PWM Output OC1x
PWM Output OC1x
Output OC1X
H
H
L
L
1142E–AVR–02/03

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