ATMEGA163 ATMEL [ATMEL Corporation], ATMEGA163 Datasheet - Page 119
ATMEGA163
Manufacturer Part Number
ATMEGA163
Description
8-bit Microcontroller with 16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA163.pdf
(187 pages)
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Port B Schematics
1142E–AVR–02/03
• AIN1 – PORTB, Bit 3
AIN1, Analog Comparator Negative input. When configured as an input (DDB3 is
cleared (zero)) and with the internal MOS pull up resistor switched off (PB3 is cleared
(zero)), this pin also serves as the negative input of the On-chip Analog Comparator.
During Power-down mode, the schmitt trigger of the digital input is disconnected. This
allows analog signals which are close to V
causing excessive power consumption.
• AIN0 – PORTB, Bit 2
AIN0, Analog Comparator Positive input. When configured as an input (DDB2 is cleared
(zero)) and with the internal MOS pull up resistor switched off (PB2 is cleared (zero)),
this pin also serves as the positive input of the On-chip Analog Comparator. During
Power-down mode, the schmitt trigger of the digital input is disconnected. This allows
analog signals which are close to V
ing excessive power consumption.
• T1 – PORTB, Bit 1
T1, Timer/Counter1 Counter Source. See the Timer description for further details.
• T0 – PORTB, Bit 0
T0: Timer/Counter0 Counter Source. See the Timer description for further details.
Note that all port pins are synchronized. The synchronization latches are not shown in
the figures.
Figure 64. PORTB Schematic Diagram (Pins PB0 and PB1)
PUD: PULL-UP DISABLE
CC
/2 to be present during Power-down without caus-
PUD
CC
2
/2 to be present during Power-down without
ATmega163(L)
119
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