W9751G6KB WINBOND [Winbond], W9751G6KB Datasheet - Page 31
W9751G6KB
Manufacturer Part Number
W9751G6KB
Description
8M ? 4 BANKS ? 16 BIT DDR2 SDRAM
Manufacturer
WINBOND [Winbond]
Datasheet
1.W9751G6KB.pdf
(87 pages)
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8. OPERATION MODE
8.1
Notes:
1. All DDR2 SDRAM commands are defined by states of CS , RAS , CAS ,
2. Bank addresses BA[1:0] determine which bank is to be operated upon. For (E)MRS BA selects an (Extended) Mode Register.
3. Burst reads or writes at BL = 4 can not be terminated or interrupted. See Burst Interrupt in section 7.5 for details.
4. V
5. Self Refresh Exit is asynchronous.
6. The Power Down does not perform any refresh operations. The duration of Power Down Mode is therefore limited by the
Auto-precharge
Auto-precharge
Mode Register
Bank Activate
Precharge All
No Operation
Power Down
Power Down
Self Refresh
Self Refresh
refresh requirements outlined in section 7.9.
COMMAND
Single Bank
Mode Entry
(Extended)
Precharge
Write with
Read with
Mode Exit
REF
Deselect
Refresh
Device
Banks
Read
Write
Entry
Exit
Set
Command Truth Table
must be maintained during Self Refresh operation.
Previous
Cycle
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
CKE
Current
Cycle
H
H
H
H
H
H
H
H
X
X
H
H
H
L
L
BA1
BA0
BA
BA
BA
BA
BA
BA
BA
X
X
X
X
X
X
X
X
Column
Column
Column
Column
A12
A11
X
X
X
X
X
X
X
X
X
Row Address
- 31 -
OP Code
A10
H
H
H
X
X
X
X
X
X
X
L
L
L
Column
Column
Column
Column
A9-A0
X
X
X
X
X
X
X
X
X
WE
Publication Release Date: Dec. 09, 2011
and CKE at the rising edge of the clock.
CS
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
H
H
H
H
H
H
H
H
L
L
L
L
X
L
L
X
X
X
W9751G6KB
CAS
H
H
H
H
X
X
H
X
H
X
H
L
L
L
L
L
L
L
WE
H
H
H
H
H
H
H
H
H
L
L
L
L
L
X
X
X
X
Revision A01
NOTES
1,2,3
1,2,3
1,2,3
1,2,3
1,4,5
1,2
1,2
1,2
1,4
1,6
1,6
1
1
1
1