W9751G6KB WINBOND [Winbond], W9751G6KB Datasheet - Page 19

• Manufacturer Part Number: W9751G6KB
• Description: 8M ? 4 BANKS ? 16 BIT DDR2 SDRAM
• Manufacturer: WINBOND [Winbond]

However, to prevent any impedance glitch on the channel, the following conditions must be met.
Now the ODT is ready for normal operation with the new setting, and the ODT signal may be raised
again to turned on the ODT. Following timing diagram shows the proper Rtt update procedure.
CMD
ODT
CLK
CLK
CMD
ODT
CLK
CLK


Rtt
Rtt
1) EMRS command directed to EMR(1), which updates the information in EMR(1)[A6,A2], i.e. Rtt (Nominal).
2) "setting" in this diagram is the Register and I/O setting, not what is measured from outside.
1) EMRS command directed to EMR(1), which updates the information in EMR(1)[A6,A2], i.e. Rtt (Nominal).
2) "setting" in this diagram is what is measured from outside.
t
ODT must remain LOW for the entire duration of t
AOFD
must be met before issuing the EMRS command.
Figure 11 – ODT update delay timing - t
t
AOFD
Old setting
Old setting
EMRS
t
AOFD
Figure 10 – ODT update delay timing - t
t
MOD,min
NOP
EMRS
t
MOD,max
Updating
- 19 -
NOP
NOP
t
MOD,max
MOD
MOD
, as measured from outside
window, until t
NOP
Publication Release Date: Dec. 09, 2011
NOP
MOD
MOD
t
IS
NOP
,max is met.
W9751G6KB
New setting
NOP
t
t
AOND
IS
NOP
Revision A01
New setting
NOP
NOP