W9751G6KB WINBOND [Winbond], W9751G6KB Datasheet - Page 29

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W9751G6KB

Manufacturer Part Number
W9751G6KB
Description
8M ? 4 BANKS ? 16 BIT DDR2 SDRAM
Manufacturer
WINBOND [Winbond]
Datasheet

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Notes:
1. RTP[cycles] = RU{ tRTP[nS] / tCK(avg)[nS] }, where RU stands for round up.
2. For a given bank, the precharge period should be counted from the latest precharge command, either one bank precharge or
7.8
DDR2 SDRAM requires a refresh of all rows in any rolling 64 ms interval. The necessary refresh can
be generated in one of two ways: by explicit Auto Refresh commands or by an internally timed Self
Refresh mode. Dividing the number of device rows into the rolling 64 ms interval defines the average
refresh interval, t
When CS , RAS and CAS are held LOW and WE HIGH at the rising edge of the clock, the chip
enters the Refresh mode (REF). All banks of the DDR2 SDRAM must be precharged and idle for a
minimum of the Precharge time (t
counter, internal to the device, supplies the bank address during the refresh cycle. No control of the
external address bus is required once this cycle has started. (Example timing waveform refer to 10.28
Self Refresh diagram in Chapter 10)
7.9
Power-down is synchronously entered when CKE is registered LOW, along with NOP or Deselect
command. CKE is not allowed to go LOW while mode register or extended mode register command
time, or read or write operation is in progress. CKE is allowed to go LOW while any other operation
such as row activation, Precharge or Auto-precharge or Auto Refresh is in progress, but power down
I
The DLL should be in a locked state when power-down is entered. Otherwise DLL should be reset
after exiting power-down mode for proper read operation.
Read w/AP
Command
Write w/AP
DD
Precharge
Precharge
precharge all, issued to that bank. The precharge period is satisfied after tRP depending on the latest precharge command
issued to that bank.
From
Read
Write
specification will not be applied until finishing those operations.
All
Refresh Operation
Power Down Mode
Precharge (to same Bank as Read w/AP)
Precharge (to same Bank as Write w/AP)
Precharge (to same Bank as Precharge)
Precharge (to same Bank as Read)
REFI
Precharge (to same Bank as Write)
, which is a guideline to controllers for distributed refresh timing.
Table 5 – Precharge & Auto-precharge clarifications
To Command
Precharge All
Precharge All
Precharge All
Precharge All
Precharge All
Precharge All
Precharge
RP
) before the Refresh command (REF) can be applied. An address
- 29 -
Minimum Delay between “From
Command” to “To Command”
AL + BL/2 + max(RTP, 2) - 2
AL + BL/2 + max(RTP, 2) - 2
AL + BL/2 + max(RTP, 2) - 2
AL + BL/2 + max(RTP, 2) - 2
WL + BL/2 + t
WL + BL/2 + t
WL + BL/2 + WR
WL + BL/2 + WR
Publication Release Date: Dec. 09, 2011
1
1
1
1
WR
WR
W9751G6KB
Unit
clks
clks
clks
clks
clks
clks
clks
clks
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clks
clks
clks
Revision A01
Notes
1, 2
1, 2
1, 2
1, 2
2
2
2
2
2
2
2
2

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