HD64F3670 RENESAS [Renesas Technology Corp], HD64F3670 Datasheet - Page 83

• Manufacturer Part Number: HD64F3670
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

4.3
When an address break is set to an instruction after a conditional branch instruction, and the
instruction set when the condition of the branch instruction is not satisfied is executed (see figure
4.3), note that an address break interrupt request is not generated. Therefore an address break must
not be set to the instruction after a conditional branch instruction.
Figure 4.3 Operation when Condition is not Satisfied in Branch Instruction
When the address break is specified in the data read cycle
Usage Notes
Register setting
• ABRKCR = H'A0
• BAR = H'025A
Address
bus
Interrupt
request
Figure 4.2 Address Break Interrupt Operation Example (2)
prefetch
instruc-
Adress bus
tion 1
Adress break
interrupt request
MOV
025C
prefetch
instruc-
tion 2
MOV
[Register setting]
Program
025E
*
ABRKCR=H'80
BAR=H'0136
0258
025A
025C
0260
0262
:
prefetch
instruc-
instruction
NOP
NOP
NOP
MOV.W @H'025A,R0
NOP
NOP
prefetch
tion
0260
BNE
0134
:
execution
instruction
instruc-
prefetch
MOV
025A
NOP
tion
0136
*0136
[Program]
012A
0134
0138
:
:
Interrupt acceptance
instruction
prefetch
instruc-
prefetch
MOV
NOP
102A
0262
tion
NOP
BNE
NOP
MOV.B . . .
Underline indicates the address
to be stacked.
:
:
instruction
prefetch
prefetch
instru-
NOP
0138
ction
Next
Rev. 2.0, 03/02, page 59 of 298
0264
processing
Internal
Stack
save
SP-2