HD64F3670 RENESAS [Renesas Technology Corp], HD64F3670 Datasheet - Page 187

• Manufacturer Part Number: HD64F3670
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
4
3
2
1
0
Bit Name
FER
PER
TEND
MPBR
MPBT
Initial Value
0
0
1
0
0
R/W
R/W
R/W
R
R
R/W
Description
Framing Error
[Setting condition]
[Clearing condition]
Parity Error
[Setting condition]
[Clearing condition]
Transmit End
[Setting conditions]
[Clearing conditions]
Multiprocessor Bit Receive
MPBR stores the multiprocessor bit in the receive
character data. When the RE bit in SCR3 is
cleared to 0, its previous state is retained.
Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to
the transmit character data.
When a framing error occurs in reception
When 0 is written to FER after reading FER =
1
When a parity error is generated during
reception
When 0 is written to PER after reading PER =
1
When the TE bit in SCR3 is 0
When TDRE = 1 at transmission of the last bit
of a 1-byte serial transmit character
When 0 is written to TEND after reading TEND
= 1
When the transmit data is written to TDR
Rev. 2.0, 03/02, page 163 of 298