HD64F3670 RENESAS [Renesas Technology Corp], HD64F3670 Datasheet - Page 194

• Manufacturer Part Number: HD64F3670
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

13.4.2
Follow the flowchart as shown in figure 13.4 to initialize the SCI3. When the TE bit is cleared to
0, the TDRE flag is set to 1. Note that clearing the RE bit to 0 does not initialize the contents of
the RDRF, PER, FER, and OER flags, or the contents of RDR. When the external clock is used in
asynchronous mode, the clock must be supplied even during initialization.
Rev. 2.0, 03/02, page 170 of 298
SCI3 Initialization
and MPIE bits. For transmit (TE=1),
SCR3 to 1, and set RIE, TIE, TEIE,
Clear TE and RE bits in SCR3 to 0
Set CKE1 and CKE0 bits in SCR3
Set data transfer format in SMR
also set the TxD bit in PMR1.
<Initialization completion>
1-bit interval elapsed?
Set TE and RE bits in
Start initialization
Set value in BRR
Figure 13.4 Sample SCI3 Initialization Flowchart
Yes
Wait
No
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Set the clock selection in SCR3.
Be sure to clear bits RIE, TIE, TEIE, and
MPIE, and bits TE and RE, to 0.
When the clock output is selected in
asynchronous mode, clock is output
immediately after CKE1 and CKE0
settings are made. When the clock
output is selected at reception in clocked
synchronous mode, clock is output
immediately after CKE1, CKE0, and RE
are set to 1.
Set the data transfer format in SMR.
Write a value corresponding to the bit
rate to BRR. Not necessary if an
external clock is used.
Wait at least one bit interval, then set the
TE bit or RE bit in SCR3 to 1. RE
settings enable the RXD pin to be used.
For transmission, set the TXD bit in
PMR1 to 1 to enable the TXD output pin
to be used. Also set the RIE, TIE, TEIE,
and MPIE bits, depending on whether
interrupts are required. In asynchronous
mode, the bits are marked at
transmission and idled at reception to
wait for the start bit.