MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 82
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
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System Integration Module (SIM)
7.4 Reset and System Initialization
7.4.1 External Pin Reset
Technical Data
82
2OSCOUT
RST
IAB
The MCU has these reset sources:
All of these resets produce the vector $FFFE–$FFFF ($FEFE–$FEFF in
Monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter (see
external reset does not. Each of the resets sets a corresponding bit in
the reset status register (RSR). (See
The RST pin circuits include an internal pull-up device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the reset
status register (RSR) is set as long as RST is held low for a minimum of
67 2OSCOUT cycles, assuming that the POR was not the source of the
reset. See
PC
•
•
•
•
•
•
Reset Type
Figure 7-4. External Reset Timing
Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
All others
POR
System Integration Module (SIM)
Table 7-2
Table 7-2. PIN Bit Set Timing
for details.
Number of Cycles Required to Set PIN
Figure 7-4
MC68H(R)C908JL3E/JK3E/JK1E
4163 (4096 + 64 + 3)
7.8 SIM
67 (64 + 3)
VECT H VECT L
shows the relative timing.
7.5 SIM
Registers.)
Counter), but an
MOTOROLA
—
Rev. 2.0
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