MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 50
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
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FLASH Memory (FLASH)
4.8 FLASH Protection
4.9 FLASH Block Protect Register
Technical Data
50
Address:
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH Block
Protect Register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
The FLASH Block Protect Register is implemented as an 8-bit I/O
register. The value in this register determines the starting address of the
protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Register Bit 7 to Bit 0
Reset:
Read:
Write:
Start address of FLASH block protect
BPR[7:1] represent bits [12:6] of a 16-bit memory address. Bits
[15:13] are logic 1’s and bits [5:0] are logic 0’s.
BPR0 is used only for BPR[7:0] = $FF, for no block protection.
Figure 4-4. FLASH Block Protect Register (FLBPR)
$FE09
BPR7
Bit 7
0
FLASH Memory (FLASH)
BPR6
6
0
BPR5
5
0
BPR4
4
0
MC68H(R)C908JL3E/JK3E/JK1E
1 1 1
BPR3
3
0
16-bit memory address
BPR[7:1]
BPR2
2
0
BPR1
0 0 0 0 0 0
1
0
MOTOROLA
—
Rev. 2.0
BPR0
Bit 0
0
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