MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 133
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
(226 pages)
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10.9 I/O Signals
10.10 I/O Registers
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
Port D shares two of its pins with the TIM. The two TIM channel I/O pins
are PTD4/TCH0 and PTD5/TCH1.
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTD4/TCH0 can be configured as
a buffered output compare or buffered PWM pin.
The following I/O registers control and monitor operation of the TIM:
•
•
•
•
•
—
TIM status and control register (TSC)
TIM counter registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0 and TSC1)
TIM channel registers (TCH0H:TCH0L and TCH1H:TCH1L)
Rev. 2.0
Timer Interface Module (TIM)
Timer Interface Module (TIM)
Technical Data
I/O Signals
133
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