MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 125
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
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10.5.1 TIM Counter Prescaler
10.5.2 Input Capture
10.5.3 Output Compare
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
$002A
$0029
TIM Channel 1
TIM Channel 1
Register High
Register Low
(TCH1H)
(TCH1L)
The TIM clock source is one of the seven prescaler outputs. The
prescaler generates seven clock rates from the internal bus clock. The
prescaler select bits, PS[2:0], in the TIM status and control register
(TSC) select the TIM clock source.
With the input capture function, the TIM can capture the time at which an
external event occurs. When an active edge occurs on the pin of an input
capture channel, the TIM latches the contents of the TIM counter into the
TIM channel registers, TCHxH:TCHxL. The polarity of the active edge is
programmable. Input captures can generate TIM CPU interrupt
requests.
With the output compare function, the TIM can generate a periodic pulse
with a programmable polarity, duration, and frequency. When the
counter reaches the value in the registers of an output compare channel,
the TIM can set, clear, or toggle the channel pin. Output compares can
generate TIM CPU interrupt requests.
Figure 10-2. TIM I/O Register Summary
—
Rev. 2.0
Reset:
Reset:
Read:
Write:
Read:
Write:
Timer Interface Module (TIM)
Bit15
Bit7
= Unimplemented
Bit14
Bit6
Bit13
Bit5
Indeterminate after reset
Indeterminate after reset
Bit12
Bit4
Bit11
Bit3
Timer Interface Module (TIM)
Bit10
Bit2
Functional Description
Bit9
Bit1
Technical Data
Bit8
Bit0
125
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