MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 157
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MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
(226 pages)
- Current page: 157 of 226
- Download datasheet (2Mb)
12.3.2 Data Direction Register A (DDRA)
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
NOTE:
Address:
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic one to a DDRA bit enables the output buffer
for the corresponding port A pin; a logic zero disables the output buffer.
DDRA[6:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 12-4
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA[6:0], configuring all port A pins as inputs.
—
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Rev. 2.0
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
$0004
Bit 7
0
0
Figure 12-3. Data Direction Register A (DDRA)
shows the port A I/O logic.
Input/Output (I/O) Ports
DDRA6
6
0
Figure 12-4. Port A I/O Circuit
RESET
DDRA5
5
0
DDRA4
DDRAx
4
0
PTAx
DDRA3
3
0
DDRA2
To Keyboard Interrupt Circuit
2
0
Input/Output (I/O) Ports
PTAPUEx
DDRA1
1
0
Technical Data
30k
DDRA0
Bit 0
Port A
0
PTAx
157
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