PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 431

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PEB20534H-10

Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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14.6.5.2 Receive Cycle Timing
Figure 100
Note:
1. Whichever supplies the receive clock depending on the selected clock mode:
2. NRZ, NRZI and Manchester data encoding
3. FM0 and FM1 data encoding
4. If Carrier Detect auto start feature enabled (not for clock modes 1 and 5)
Semiconductor Group
externally clocked via RxCLK or XTAL1 or
internally clocked via DPLL, BRG or BCR.
(No edge relation can be measured if the internal receive clock is derived from the
external clock source by devision stages (BGR, BCR) or DPLL)
Receive Clock
(Note 1)
(Note 2)
(Note 3)
(Note 4)
Receive Cycle Timing
RxD
RxD
CD
91
93
92
431
91
91
90
94
92
92
Electrical Characteristics
Data Sheet 09.98
PEB 20534

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