PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 156

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PEB20534H-10

Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Semiconductor Group
Now, the DPLL is more insensitive to high jitter amplitudes but needs more time to reach
the optimal sampling position. To ensure correct data sampling, preambles should
precede the data information.
Figures 52, 53 and 54 explain the DPLL algorithms used for the different data
encodings.
Figure 52
Figure 53
DPLL
Count
Correction
DPLL
Output
DPLL
Count
Correction
DPLL
Output
Coding with Phase Shift Enabled (CCR0:PSD = ‘0’)
Encoding with Phase Shift Disabled (CCR0:PSD = ‘1’)
DPLL Algorithm for NRZ and NRZI
DPLL Algorithm for NRZ and NRZI
0
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0
1
2
+PA
3
+PA
4
Serial Communication Controller (SCC) Cores
5
156
6
Bit Cell
Bit Cell
7
PS
8
9 10 11 12 13 14 15
-PA
-PA
ITD04820
Data Sheet 09.98
PEB 20534
0
ITD01806
0

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