PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 117

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PEB20534H-10

Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Figure 34
The operating mode of the serial channel SSC is controlled by its bit-addressable control
register SSCCON. This register serves for two purposes:
• during programming (SSC disabled by SSCEN=’0’) it provides access to a set of
• during operation (SSC enabled by SSCEN=’1’) it provides access to a set of status
A detailed control register description for each of the two modes is provided in “SSC
Registers Description” on page 355.
The shift register of the SSC is connected to both the transmit pin and the receive pin via
the pin control logic (see block diagram). Transmission and reception of serial data is
synchronized and takes place at the same time, i.e. the same number of transmitted bits
is also received. Transmit data is written into the Transmit Buffer SSCTB. It is moved to
the shift register as soon as this is empty. An SSC-master (SSCMS=’1’) immediately
starts transmitting, while an SSC-slave (SSCMS=’0’) waits for an active shift clock.
Semiconductor Group
control bits;
flags.
Transmit Int. Request
Receive Int. Request
Clock
CPU
Error Int.Request
Synchronous Serial Channel SSC Block Diagram
Baud Rate
Generator
Register SSCTB
Transmit Buffer
I n t e r n a l B u s
Status
16-Bit Shift Register
SSC Control Block
Control
Clock
Clock
Shift
117
Control
Register SSCRB
Receive Buffer
Master Clock
Slave Clock
Control
Pin
Multi Function Port (MFP)
MCB01957
Data Sheet 09.98
SCLK
MTSR
MRST
PEB 20534

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