PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 136

• Manufacturer Part Number: PEB20534H-10
• Description: DMA Supported Serial Communication Controller with 4 Channels DSCC4
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
In this case a useful sequence of clearing the SCC receive FIFO during operation is:
Register Bit field
CCR2
CMDR
CMDR
CCR2
RAC=’0’
RRES=’1’ Resets the receive protocol logic and clears the SCC
RFRD=’1’ Generates a frame end indication which is transferred to the
RAC=’1’
Description
Switches the receive protocol logic to inactive state not
accepting any more data from the serial line.
receive FIFO (self-resetting command bit).
central RFIFO terminating any partial frame. If no partial
frame was stored, this will result in a "frame" with byte
number zero.
Switches the receive protocol logic to active state accepting
receive data from the serial line.
Serial Communication Controller (SCC) Cores
136
Data Sheet 09.98
PEB 20534