DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 79
DAC1408D650C1
Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650C1.pdf
(98 pages)
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NXP Semiconductors
Table 144. LN0_CFG_0 register (address 00h) bit description
Default settings are shown highlighted.
Table 145. LN0_CFG_1 register (address 01h) bit description
Default settings are shown highlighted.
Table 146. LN0_CFG_2 register (address 02h) bit description
Default settings are shown highlighted.
Table 147. LN0_CFG_3 register (address 03h) bit description
Default settings are shown highlighted.
Table 148. LN0_CFG_4 register (address 04h) bit description
Default settings are shown highlighted.
Table 149. LN0_CFG_5 register (address 05h) bit description
Default settings are shown highlighted.
Table 150. LN0_CFG_6 register (address 06h) bit description
Default settings are shown highlighted.
Table 151. LN0_CFG_7 register (address 07h) bit description
Default settings are shown highlighted.
DAC1408D650
Preliminary data sheet
Bit
7 to 0
Bit
3 to 0
Bit
4 to 0
Bit
7
4 to 0
Bit
7 to 0
Bit
4 to 0
Bit
7 to 0
Bit
7 to 6
4 to 0
Symbol
LN0_DID[7:0]
Symbol
LN0_BID[3:0]
Symbol
LN0_LID[4:0]
Symbol
LN0_SCR
LN0_L[4:0]
Symbol
LN0_F[7:0]
Symbol
LN0_K[4:0]
Symbol
LN0_M[7:0]
Symbol
LN0_CS[1:0]
LN0_N[4:0]
10.15.2.12 Page 6 bit definition detailed description
Please refer to
tables, all the values emphasized in bold are the default values.
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
Table 143
All information provided in this document is subject to legal disclaimers.
Access
R
Access
R
Access
R
Access
R
R
Access
R
Access
R
Access
R
Access
R
R
Rev. 02 — 11 August 2010
for a register overview and their default values. In the following
Value
-
Value
-
Value
-
Value
-
-
Value
Value
-
Value
-
Value
-
-
-
Description
lane 0 device ID
Description
lane 0 bank ID
Description
lane 0 lane ID
Description
scrambling on
number of lanes
Description
Description
number of frames per multi-frame
Description
number of converter per device
Description
number of control bits
number of octets per frame
converter resolution
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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