DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 43

• Manufacturer Part Number: DAC1408D650C1
• Description: Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 31.
Default settings are shown highlighted.
Table 32.
Table 33.
Table 34.
Default settings are shown highlighted.
Table 35.
Default settings are shown highlighted.
Table 36.
Default settings are shown highlighted.
DAC1408D650
Preliminary data sheet
Bit
7
6
5 to 0
Bit
7 to 6
5 to 0
Bit
7 to 6
5 to 0
Bit
1
0
Bit
3 to 1
Bit
3 to 1
Symbol
DAC_B_PD
DAC_B_SLEEP
DAC_B_OFFSET[5:0]
Symbol
DAC_B_GAIN_COARSE[1:0]
DAC_B_GAIN_FINE[5:0]
Symbol
DAC_B_GAIN_COARSE[3:2]
DAC_B_OFFSET[11:6]
Symbol
MINUS_3DB
NOISE_SHAPER
Symbol
DAC_DIG_BIAS[2:0]
Symbol
DAC_MST_BIAS[2:0]
DAC_B_CFG_1 register (address 0Ch) bit description
DAC_B_CFG_2 register (address 0Dh) bit description
DAC_B_CFG_3 register (address 0Eh) bit description
DAC_CFG register (address 0Fh) bit description
DAC_CURRENT_0 register (address 11h) bit description
DAC_CURRENT_1 register (address 12h) bit description
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
Access
R/W
R/W
Access
R/W
R/W
Access
R/W
R/W
Access
R/W
Access
R/W
Rev. 02 — 11 August 2010
Value
0
1
0
1
00h
Value
1h
00h
Value
3h
00h
Value
0
1
0
1
Value
3h
Value
3h
Description
DAC B power
DAC B Sleep mode
Description
less significant 2 bits for the DAC B gain setting for
coarse adjustment
the 6 bits for the DAC B gain setting for fine
adjustment
Description
most significant 2 bits for the DAC B gain setting for
coarse adjustment
most significant 6 bits for the DAC B offset
Description
NCO gain
noise shaper
Description
bias current control (see
Description
bias current control (see
lower 6 bits for the DAC B offset
on
off
disabled
enabled
unity
−3 dB
disabled
enabled
DAC1408D650
Table
Table
47)
47)
© NXP B.V. 2010. All rights reserved.
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