DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 28

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DAC1408D650C1

Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
DAC1408D650
Preliminary data sheet
10.8 DAC transfer function
Table 12.
The full scale output current for each DAC is the sum of the two complementary current
outputs:
The output current depends on the digital input data:
The setting applied to CODING (register 00h[2]; see
map”) defines whether the DAC1408D650 operates with a binary input or a two’s
complement input.
Table 13
Table 13.
First interpolation filter
Lower
H(1)
H(2)
H(3)
H(4)
H(5)
Data
0
...
2048
...
4095
I
I
I
IOUTP
IOUTN
O fs
( )
=
=
=
I
shows the output current as a function of the input data, when I
I13/Q13 to I0/Q0
Binary
00 0000 0000 0000
...
10 0000 0000 0000
...
11 1111 1111 1111
IOUTP
I
I
Inversion filter coefficients
DAC transfer function
O fs
O fs
( )
( )
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
×
+
×
I
IOUTN
DATA
--------------- -
16383
16383 DATA
------------------------------------ -
Rev. 02 — 11 August 2010
16383
Upper
H(9)
H(8)
H(7)
H(6)
-
Two’s complement
10 0000 0000 0000
...
00 0000 0000 0000
...
01 1111 1111 1111
Table 18 “Page 0 register allocation
DAC1408D650
Value
2
−4
10
−35
401
IOUTP
0 mA
...
10 mA
...
20 mA
© NXP B.V. 2010. All rights reserved.
O(fs)
IOUTN
20 mA
...
10 mA
...
0 mA
= 20 mA.
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(3)
(4)
(5)

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