DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 62
![no-image](/images/no-image-200.jpg)
DAC1408D650C1
Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650C1.pdf
(98 pages)
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NXP Semiconductors
Table 90.
Table 91.
Default settings are shown highlighted.
DAC1408D650
Preliminary data sheet
Bit
7 to 4
3 to 0
Bit
7 to 6
5 to 4
3 to 2
1 to 0
Symbol
MAN_ALIGN_LN3[3:0]
MAN_ALIGN_LN2[3:0]
Symbol
SEL_KOUT_ UNEXP_LN23[1:0]
SEL_KOUT_ UNEXP_LN10[1:0]
SEL_NIT_ERR_ LN23[1:0]
SEL_NIT_ERR_ LN10[1:0]
MAN_ALIGN_LN_2_3 register (address 0Ah) bit description
FA_ERR_HANDLING register (address 0Bh) bit description
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
Access
R/W
R/W
R/W
R/W
Rev. 02 — 11 August 2010
Value
00h
00h
Value
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Description
indicates alignment data-delay for lane 3 [1..15]
indicates alignment data-delay for lane 2 [1..15]
Description
lane 2/lane 3 unexpected /K/ error handling
lane 0/lane 1 unexpected /K/ error handling
lane 2/lane 3 nit-error handling
lane 0/lane 1 not-error handling
error_handling i.c.o. unexpected /K/ in lane 2
or lane 3
error_handling i.c.o. unexpected /K/ in lane 2 and
lane 3
error_handling i.c.o. unexpected /K/ in lane 2
error_handling i.c.o. unexpected /K/ in lane 3
error_handling i.c.o. unexpected /K/ in lane 0
or lane 1
error_handling i.c.o. unexpected /K/ in lane 0 and
lane 1
error_handling i.c.o. unexpected /K/ in lane 0
error_handling i.c.o. unexpected /K/ in lane 1
error_handling i.c.o. nit-errors in lane 2 or
lane 3
error_handling i.c.o. nit-errors lane 2 and lane 3
error_handling i.c.o. nit-errors in lane 2
error_handling i.c.o. nit-errors in lane 3
error_handling i.c.o. nit-errors in lane 0 or
lane 1
error_handling i.c.o. nit-errors lane 0 and lane 1
error_handling i.c.o. nit-errors in lane 0
error_handling i.c.o. nit-errors in lane 1
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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