DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 6

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DAC1408D650C1

Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
7. Limiting values
8. Thermal characteristics
DAC1408D650
Preliminary data sheet
Table 2.
[1]
[2]
Table 3.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
Table 4.
[1]
Symbol
VIN_N0
VIN_P0
V
VIN_P1
VIN_N1
VIN_N2
VIN_P2
V
VIN_P3
VIN_N3
n.c.
n.c.
JTAG
GND
Symbol
V
V
V
T
T
T
Symbol
R
R
stg
amb
j
DDD(1V8)
DDD(1V8)
DDA(3V3)
DDA(1V8)
DDD
th(j-a)
th(j-c)
P: power supply; G: ground; I: input; O: output.
H = heatsink (exposed die pad to be soldered to GND. A minimum of 81 thermal vias are required)
The supply voltage V
voltage differences ΔV
The supply voltages V
supply voltage differences ΔV
In compliance with JEDEC test board, in free air.
Pin description
Limiting values
Thermal characteristics
Parameter
analog supply voltage (3.3 V)
analog supply voltage (1.8 V)
digital supply voltage
storage temperature
ambient temperature
junction temperature
Parameter
thermal resistance from junction to ambient
thermal resistance from junction to case
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
DDA(3V3)
DDA(1V8)
Pin
52
53
54
55
56
57
58
59
60
61
62
63
64
H
CC
Rev. 02 — 11 August 2010
[2]
are respected.
…continued
may have any value between −0.5 V and +4.6 V provided that the supply
CC
and V
Type
I
I
P
I
I
I
I
P
I
I
-
-
I
G
are respected.
DDD
[1]
may have any value between −0.5 V and +2.5 V provided that the
Description
serial interface lane 0 negative input
serial interface lane 0 positive input
digital supply voltage 1.8 V
serial interface lane 1 positive input
serial interface lane 1 negative input
serial interface lane 2 negative input
serial interface lane 2 positive input
digital supply voltage 1.8 V
serial interface lane 3 positive input
serial interface lane 3 negative input
not connected
not connected
JTAG test mode select (must be grounded)
ground
Conditions
Conditions
DAC1408D650
[1]
[2]
[2]
Min
−0.5
−0.5
−0.5
−55
−40
−40
© NXP B.V. 2010. All rights reserved.
[1]
[1]
Typ
18.7
<tbd>
Max
+4.6
+2.5
+2.5
+150
+85
+125
Unit
K/W
K/W
6 of 98
Unit
V
V
V
°C
°C
°C

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