DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 75

• Manufacturer Part Number: DAC1408D650C1
• Description: Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 137. CNTRL_FLAGCNT_LN01 register (address 1Bh) bit description
Default settings are shown highlighted.
Table 138. CNTRL_FLAGCNT_LN23 register (address 1Ch) bit description
Default settings are shown highlighted.
Table 139. MON_FLAGS_RESET register (address 1Dh) bit description
DAC1408D650
Preliminary data sheet
Bit
7
6 to 4
3
2 to 0
Bit
7
6 to 4
3
2 to 0
Bit
7
6
5
4
3
2
1
0
Symbol
RST_CFC_LN1
SEL_CFC_LN1[2:0]
RST_CFC_LN0
SEL_CFC_LN0[2:0]
Symbol
RST_CFC_LN3
SEL_CFC_LN3[2:0]
RST_CFC_LN2
SEL_CFC_LN2[2:0]
Symbol
RST_NIT_ERR-FLAGS
RST_DISP_ERR_FLAGS
RST_KOUT_FLAGS
RST_KOUT_UNEXPECTED_FLAGS R/W
RST_K28_LN3_FLAGS
RST_K28_LN2_FLAGS
RST_K28_LN1_FLAGS
RST_K28_LN0_FLAGS
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 02 — 11 August 2010
Value
0
5h
0
5h
Value
0
5h
0
5h
Value
0
0
0
0
0
0
0
0
Description
reset flagcnt lane 1
select cnt-enable flagcnt lane 1 (see
reset flagcnt lane 0
select cnt-enable flagcnt lane 0 (see
Description
reset flagcnt lane 3
select cnt-enable flagcnt lane 3 (see
reset flagcnt lane 2
select cnt-enable flagcnt lane 2 (see
Description
reset nit-error monitor flags
reset disparity monitor flags
reset k-symbols monitor flags
reset unexpected k-symbols monitor flags
reset k28_x monitor flags for lane 3
reset k28_x monitor flags for lane 2
reset k28_x monitor flags for lane 1
reset k28_x monitor flags for lane 0
DAC1408D650
© NXP B.V. 2010. All rights reserved.
Table
Table
Table
Table
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