AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 34

• Manufacturer Part Number: AD9992_07
• Description: 12-Bit CCD Signal Processor with Precision Timing Generator
• Manufacturer: AD [Analog Devices]

AD9992
XV1 TO XV23
VALTSEL0_EVEN
VALTSEL1_EVEN
V-PATTERN
COMBINED
HD
XV23
XV1
XV2
XV3
XV23
HD
XV1
XV2
XV3
Figure 41. Special V-Sequence Alternation Mode Using VALTSEL Registers to Specify Segment Order
NOTES
1. SIX V-PATTERN SEGMENTS CONCATENATED INTO A MERGED PATTERN.
2. COMMON AND REPETITIVE VTP SEGMENTS DERIVED FROM THE COMPLETE VTP PATTERN.
3. VALTSEL REGISTERS SPECIFY SEGMENT ORDER TO CREATE THE CONCATENATED MERGED PATTERN.
NOTES
1. EACH SEGMENT MUST BE THE SAME LENGTH.
V-PATTERN A
Figure 39. Vertical Timing Divided Into Four Segments: VPATA, VPATB, VPATC, and VPATD
NOTES
1. ABLE TO CONCATENATE PATTERNS TOGETHER ARBITRARILY.
2. EACH PATTERN CAN HAVE UP TO FOUR TOGGLES PROGRAMMED.
3. MAY CONCATENATE UP TO 18 PATTERNS INTO A MERGED PATTERN.
4. ODD AND EVEN LINES CAN HAVE A DIFFERENT PATTERN CONCATENATION
SEGMENT 1
VLENA = VLENB = VLENC = VLEND.
VPATA
SPECIFIED BY VALTSEL EVEN AND ODD REGISTERS.
VLENA
0
0
A B B D A C C
A
Figure 40. Concatenating Each VPAT Group in Arbitrary Order
SEGMENT 2
C
VPATC
B
0
1
A
D
V-PATTERN B
VLENB
D
SEGMENT 3
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A
VPATB
1
0
SEGMENT4
V-PATTERN C
VPATD
B C B D A B A A
VLENC
1
1
SEGMENT 5
VPATD
1
1
V-PATTERN D
VLEND
SEGMENT 6
VPATA
0
0