CY7C1471BV33_11 CYPRESS [Cypress Semiconductor], CY7C1471BV33_11 Datasheet - Page 12

• Manufacturer Part Number: CY7C1471BV33_11
• Description: 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Flow-Through SRAM with NoBL Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

Truth Table
The truth table for CY7C1471BV33, CY7C1473BV33, and CY7C1475BV33 follows.
Notes
Document Number: 001-15029 Rev. *E
Deselect cycle
Deselect cycle
Deselect cycle
Continue deselect cycle
Read cycle
(begin burst)
Read cycle
(continue burst)
NOP/Dummy read
(begin burst)
Dummy read
(continue burst)
Write cycle
(begin burst)
Write cycle
(continue burst)
NOP/Write abort
(begin burst)
Write abort
(continue burst)
Ignore clock edge (stall)
Sleep mode
1. X = “Don't Care.” H = Logic HIGH, L = Logic LOW. BW
2. Write is defined by BW
3. When a Write cycle is detected, all I/Os are tri-stated, even during Byte Writes.
4. The DQs and DQP
5. CEN = H, inserts wait states.
6. Device powers up deselected with the I/Os in a tri-state condition, regardless of OE.
7. OE is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles. During a read cycle DQs and DQP
are asserted, see section
inactive or when the device is deselected, and DQs and DQP
Operation
X
pins are controlled by the current cycle and the OE signal. OE is asynchronous and is not sampled with the clock.
X
, and WE. See section
Truth Table for Read/Write on page 13
Address
External
External
External
Current
Used
None
None
None
None
None
None
Next
Next
Next
Next
Truth Table for Read/Write on page
X
CE
H
X
X
X
X
X
X
X
X
X
= L signifies at least one Byte Write Select is active, BW
L
L
L
L
1
CY7C1471BV33, CY7C1473BV33, CY7C1475BV33
X
CE
= data when OE is active.
H
X
X
X
H
X
H
X
X
H
X
X
X
L
for details.
2
CE
X
H
X
X
X
X
X
X
X
X
L
L
L
L
3
ZZ
H
L
L
L
L
L
L
L
L
L
L
L
L
L
13.
ADV/LD
H
H
H
H
H
X
L
L
L
L
L
L
L
X
WE
X
X
X
X
H
X
H
X
X
X
X
X
L
L
[1, 2, 3, 4, 5, 6, 7]
BW
X
X
H
H
X
X
X
X
X
X
X
X
X
L
L
= Valid signifies that the desired Byte Write Selects
X
OE
H
H
X
X
X
X
X
X
X
L
L
X
X
X
CEN CLK
H
X
L
L
L
L
L
L
L
L
L
L
L
L
X
L->H
L->H
L->H
L->H
L->H Data out (Q)
L->H Data out (Q)
L->H
L->H
L->H Data in (D)
L->H Data in (D)
L->H
L->H
L->H
= tri-state when OE is
X
Page 12 of 35
Tri-state
Tri-state
Tri-state
Tri-state
Tri-state
Tri-state
Tri-state
Tri-state
Tri-state
DQ
–
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