DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 37

• Manufacturer Part Number: DS705
• Description: XA Spartan-3A DSP Automotive FPGA Family Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Table 36: Clock to Out, Propagation Delays, and Maximum Frequency for the DSP48A
DS705 (v1.1) January 20, 2009
Product Specification
Notes:
1.
2.
3.
Clock to Out from Output Register Clock to Output Pin
T
Clock to Out from Pipeline Register Clock to Output Pins
T
Clock to Out from Input Register Clock to Output Pins
T
T
T
T
Combinatorial Delays from Input Pins to Output Pins
T
T
T
T
T
T
Maximum Frequency
F
DSPCKO_PP
DSPCKO_PM
DSPCKO_PA
DSPCKO_PB
DSPCKO_PC
DSPCKO_PD
DSPDO_AP
DSPDO_BP
DSPDO_BP
DSPDO_CP
DSPDO_DP
DSPDO_OPP
MAX
Symbol
To reference the DSP48A block diagram, see UG431, XtremeDSP DSP48A for Spartan-3A DSP FPGAs User Guide.
“Yes” means that the component is in the path. “No” means that the component is being bypassed. “-” means that no path exists, so it is not
applicable.
The numbers in this table are based on the operating conditions set forth in
R
CLK (PREG) to P output
CLK (MREG) to P output
CLK (AREG) to P output
CLK (BREG) to P output
CLK (CREG) to P output
CLK (DREG) to P output
A or B input to P output
B input to P output
C input to P output
D input to P output
OPMODE input to P output
All registers used
Description
www.xilinx.com
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Pre-adder
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
-
-
-
-
-
-
-
-
Table
8.
Multiplier Post-adder
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
-
-
-
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
-
Speed Grade
Max
8.56
1.44
3.63
2.23
7.27
3.87
8.42
3.19
5.28
6.49
4.01
6.65
7.74
3.17
7.82
8.18
250
-4
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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