DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 12

• Manufacturer Part Number: DS705
• Description: XA Spartan-3A DSP Automotive FPGA Family Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Table 12: DC Characteristics of User I/Os Using Single-
Ended Standards
DS705 (v1.1) January 20, 2009
Product Specification
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
IOSTANDARD
Attribute
(3)
(5)
(3)
(3)
(3)
(3)
(3)
R
24
16
24
12
16
12
8
4
6
12
16
24
12
16
12
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
2
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(mA)
24
24
Conditions
I
1.5
12
16
12
16
24
12
16
12
16
12
OL
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
(6)
(6)
Test
–16
–24
–16
–24
–12
(mA)
–6
–0.5
–12
–16
–24
–12
–12
–16
–12
I
–2
–4
–6
–8
–2
–4
–6
–8
–2
–4
–6
–8
–2
–4
–8
–2
–4
–6
–8
–2
–4
–6
OH
(6)
(6)
(6)
(6)
(6)
(6)
10% V
Max (V)
V
0.4
0.4
0.4
0.4
0.4
0.4
Characteristics
OL
Logic Level
CCO
V
V
V
V
V
90% V
CCO
CCO
CCO
CCO
CCO
Min (V)
V
2.4
OH
–
–
–
–
–
www.xilinx.com
CCO
0.4
0.4
0.4
0.4
0.4
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Table 12: DC Characteristics of User I/Os Using Single-
Ended Standards (Cont’d)
Notes:
1.
2.
3.
4.
5.
6.
7.
HSTL_I
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL18_I
SSTL18_II
SSTL2_I
SSTL2_II
SSTL3_I
SSTL3_II
IOSTANDARD
The numbers in this table are based on the conditions set forth in
Table 8
Descriptions of the symbols used in this table are as follows:
I
I
V
V
V
V
V
V
V
For the LVCMOS and LVTTL standards: the same V
limits apply for both the Fast and Slow slew attributes.
These higher-drive output standards are supported only on FPGA
banks 1 and 3. Inputs are unrestricted. See the chapter “Using I/O
Resources” in UG331.
Tested according to the relevant PCI specifications. For
information on PCI IP solutions, see www.xilinx.com/pci. The PCI
IOSTANDARD is not supported on input-only pins.
Derate by 20% for T
Derate by 5% for T
OL
OH
OL
OH
IL
IH
CCO
REF
TT
Attribute
–
–
–
–
(4)
–
–
–
(4)
–
(4)
(4)
the output current condition under which V
the input voltage that indicates a Low logic level
–
the output current condition under which V
the input voltage that indicates a High logic level
the output voltage that indicates a Low logic level
the voltage applied to a resistor termination
the output voltage that indicates a High logic level
(4)
and
the reference voltage for setting the input switching threshold
the supply voltage for output drivers
(4)
Table
11.
J
J
above 100°C.
(mA)
24
24
13.4
16.2
Conditions
above 100°C.
I
6.7
8.1
16
16
OL
8
8
8
(7)
(7)
Test
–16
–13.4 V
–16.2
(mA)
–6.7
–8.1
–16
I
–8
–8
–8
–8
–8
OH
(7)
V
V
V
V
V
TT
TT
Max (V)
TT
TT
TT
TT
V
0.4
0.4
0.4
0.4
0.4
– 0.475 V
– 0.475 V
Characteristics
– 0.61
– 0.80
OL
– 0.6
– 0.8
Logic Level
OL
OH
is tested
is tested
OL
V
V
V
V
V
V
V
V
V
TT
TT
Min (V)
CCO
CCO
CCO
CCO
CCO
TT
TT
TT
TT
and V
V
+ 0.475
+ 0.475
+ 0.61
+ 0.80
OH
+ 0.6
+ 0.8
- 0.4
- 0.4
- 0.4
- 0.4
- 0.4
OH
12