DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 21

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DS705

Manufacturer Part Number
DS705
Description
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
Input Timing Adjustments
Table 23: Input Timing Adjustments by IOSTANDARD
DS705 (v1.1) January 20, 2009
Product Specification
Single-Ended Standards
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
HSTL_I
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL18_I
SSTL18_II
SSTL2_I
SSTL2_II
SSTL3_I
SSTL3_II
Signal Standard (IOSTANDARD)
LVCMOS25 to the Following
Convert Input Time from
R
Adjustment
Add the
Below
0.62
0.54
0.00
0.83
0.60
0.31
0.45
0.72
0.85
0.69
0.83
0.79
0.71
0.71
0.71
0.71
0.78
0.78
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Table 23: Input Timing Adjustments by IOSTANDARD (Cont’d)
Notes:
1.
2.
Differential Standards
LVDS_25
LVDS_33
BLVDS_25
MINI_LVDS_25
MINI_LVDS_33
LVPECL_25
LVPECL_33
RSDS_25
RSDS_33
TMDS_33
PPDS_25
PPDS_33
DIFF_HSTL_I_18
DIFF_HSTL_II_18
DIFF_HSTL_III_18
DIFF_HSTL_I
DIFF_HSTL_III
DIFF_SSTL18_I
DIFF_SSTL18_II
DIFF_SSTL2_I
DIFF_SSTL2_II
DIFF_SSTL3_I
DIFF_SSTL3_II
Signal Standard (IOSTANDARD)
LVCMOS25 to the Following
The numbers in this table are tested using the methodology
presented in
set forth in
These adjustments are used to convert input path times
originally specified for the LVCMOS25 standard to times that
correspond to other signal standards.
Convert Input Time from
Table
Table 27
8,
Table
and are based on the operating conditions
11, and
Table
Adjustment
Add the
Below
13.
0.79
0.79
0.79
0.84
0.84
0.80
0.80
0.83
0.83
0.80
0.81
0.81
0.80
0.98
1.05
0.77
1.05
0.76
0.76
0.77
0.77
1.06
1.06
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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