ST10F272M-4Q3 STMICROELECTRONICS [STMicroelectronics], ST10F272M-4Q3 Datasheet - Page 132

• Manufacturer Part Number: ST10F272M-4Q3
• Description: 16-bit MCU with 256 Kbyte Flash memory and 20 Kbyte RAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Electrical characteristics
Table 59.
1. V
2. V
3. Not 100% tested, guaranteed by design characterization
4. During the sample time the input capacitance C
5. This parameter includes the sample time t
6. DNL, INL, OFS and TUE are tested at V
7. The coupling factor is measured on a channel while an overload condition occurs on the adjacent not selected channels
8. Refer to scheme shown in
24.7.1
132/176
Analog Switch Resistance
main V
at V
register.
be 0x000
resistance of the analog source must allow the capacitance to reach its final voltage level within t
sample time t
Values for the sample clock t
with the conversion result. Values for the conversion clock t
Table
for all other voltages within the defined voltage range.
‘LSB’ has a value of V
For Port5 channels, the specified TUE (± 2LSB) is guaranteed also with an overload condition (see I
occurring on maximum 2 not selected analog input pins of Port5 and the absolute sum of input overload currents on all
Port5 analog input pins does not exceed 10mA.
For Port1 channels, the specified TUE is guaranteed when no overload condition is applied to Port1 pins: when an overload
condition occurs on maximum 2 not selected analog input pins of Port1 and the input positive overload current on all analog
input pins does not exceed 10mA (either dynamic or static injection), the specified TUE is degraded (± 7LSB). To obtain the
same accuracy, the negative injection current on Port1 pins must not exceed -1mA in case of both dynamic and static
injection.
with the overload current within the different specified ranges (for both positive and negative injection current).
AREF
AIN
DD
may exceed V
60.
can be tied to ground when A/D Converter is not in use: There is increased consumption (approximately 200µA) on
DD
level even when not in use, and to eventually switch off the A/D Converter circuitry setting bit ADOFF in ADCON
H
due to internal analog circuitry not being completely turned off. Therefore, it is suggested to maintain the V
or 0x3FF
A/D converter characteristics (continued)
Conversion timing control
When a conversion is started, first the capacitances of the converter are loaded via the
respective analog input pin to the current analog input voltage. The time to load the
capacitances is referred to as sample time. Next the sampled voltage is converted to a
digital value several successive steps, which correspond to the 10-bit resolution of the ADC.
During these steps the internal capacitances are repeatedly charged and discharged via the
V
The current that has to be drawn from the sources for sampling and changing charges
depends on the time that each respective step takes, because the capacitors must reach
their final voltage level within the given time, at least with a certain approximation. The
maximum current, however, that a source can deliver, depends on its internal resistance.
The time that the two different actions during conversion take (sampling, and converting)
can be programmed within a certain range in the ST10F272M relative to the CPU clock. The
absolute time that is consumed by the different conversion steps therefore is independent
from the general speed of the controller. This allows adjustment of the ST10F272M A/D
converter to the system’s properties:
Parameter
S
AREF
, changes of the analog input voltage have no effect on the conversion result.
AGND
H
pin.
, respectively
AREF
or V
(3)(8)
Figure
/1024.
S
AREF
depend on programming and can be taken from
40.
up to the absolute maximum ratings. However, the conversion result in these cases will
AREF
S
R
R
, the time for determining the digital result and the time to load the result register
SW
AD
Symbol
= 5.0V, V
AIN
can be charged/discharged by the external source. The internal
CC
CC
AGND
CC
= 0V, V
Min
depend on programming and can be taken from the next
–
–
–
Limit values
DD
= 5.0V. It is guaranteed by design characterization
1600
1300
Max
600
Table 60: A/D converter
Unit
W
W
S
Port5
Port1
. After the end of the
OV
Test condition
specification)
programming.
ST10F272M
AREF