mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 80

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MFR4200 FlexRay Communication Controller
3.2.3.3.18
FlexRay Protocol Related Parameter – gdNIT
Address 0xBE
Reset
This register defines the cycle time in which the network idle time starts. The cycle time is measured in
macroticks. The register may be modified in the configuration state only. This register is related to the
SOCCTR register (refer to the note in
(SOCCTR)”).
3.2.3.3.19
FlexRay Protocol Related Parameter – gMacroPerCycle
Address 0xB2
Reset
This register defines the number of macroticks per cycle. Writing this register is possible during the
configuration state only. The CC uses this register value during startup only.
80
Reserved
Reserved
NITC7
CL7
rw*
rw*
15
15
7
7
r
r
undefined state
undefined state
Network Idle Time Configuration Register (NITCR)
Cycle Length Register (CLR)
Since the duration of the NIT must be longer than or equal to
this register must be configured to, at most
Reserved
Reserved
NITC6
CL6
rw*
rw*
14
14
6
6
r
r
ceil ((1300µT + 170µT * MSFR)/NMLR) + 1 [nominal MT],
Figure 3-31. Network Idle Time Configuration Register
NITC13
NITC5
CL13
CL5
rw*
rw*
rw*
rw*
13
13
5
5
CLR - NIT duration [nominal MT]
Figure 3-32. Cycle Length Register
Section 3.2.3.3.34, “Start of Offset Correction Cycle Time Register
MFR4200 Data Sheet, Rev. 0
NITC12
NITC4
CL12
CL4
rw*
rw*
rw*
rw*
12
12
4
4
NOTE
NITC11
NITC3
CL11
CL3
rw*
rw*
rw*
rw*
11
11
3
3
NITC10
NITC2
CL10
CL2
rw*
rw*
rw*
rw*
10
10
2
2
NITC9
NITC1
Freescale Semiconductor
CL9
CL1
rw*
rw*
rw*
rw*
9
1
9
1
NITC8
NITC0
Eqn. 3-3
Eqn. 3-4
CL8
CL0
rw*
rw*
rw*
rw*
8
0
8
0

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