mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 101

• Manufacturer Part Number: mfr4200
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

3.2.3.5.2
FlexRay protocol related parameter – gMaxWithoutClockCorrectionFatal
Address 0xCC
Reset
This register holds the maximum number of odd communication cycles (double cycles) before a node
enters the diagnosis stop state due to missing sync frame pairs (missing rate correction).
The register can be written only in the configuration state. If the CCFCV register value equals the
MOCWCFR register value, the CC will enter the ‘red’ error state (see
Level Register
According to the protocol specification, the value of this register lies in the range [1:15]; however, the
current implementation supports values in the range [1:32767].
3.2.3.5.3
FlexRay protocol related parameter – gMaxWithoutClockCorrectonPassive
Address 0xD8
Reset
This register holds the maximum number of odd communication cycles (double cycles) before a node
enters the passive state due to missing sync frame pairs (missing rate correction).
The register can be written only in the configuration state. If the CCFCR register value (see
Section 3.2.3.6.4, “Clock Correction Failed Counter Register
value, the CC will enter the ‘yellow’ error state (see
(EHLR)”), and will signal this to the host by raising an interrupt. According to the protocol specification,
Freescale Semiconductor
MCWCP15
MCWCF15
MCWCF14
MCWCP7
rw*
rw*
rw*
rw*
15
15
7
7
undefined state
undefined state
Maximum Odd Cycles Without Clock Correction Fatal Register (MOCWCFR)
Maximum Odd Cycles Without clock Correction Passive Register (MOCWCPR)
Figure 3-65. Maximum Odd Cycles Without Clock Correction Passive Register
MCWCP14
MCWCF14
MCWCF14
(EHLR)”), and will signal this to the host by raising an interrupt.
MCWCP6
Figure 3-64. Maximum Odd Cycles Without Clock Correction Fatal Register
rw*
rw*
rw*
rw*
14
14
6
6
MCWCF14
MCWCF14
MCWCP13
MCWCP5
rw*
rw*
rw*
rw*
13
13
5
5
MFR4200 Data Sheet, Rev. 0
MCWCF14
MCWCP12
MCWCF4
MCWCP4
rw*
rw*
rw*
rw*
12
12
4
4
Section 3.2.3.6.5, “Error Handling Level Register
MCWCF14
MCWCP11
MCWCP3
MCWCF3
rw*
rw*
rw*
rw*
11
11
3
3
(CCFCR)”) equals the MOCWCPR register
MCWCP10
MCWCF14
MCWCP2
MCWCF2
Section 3.2.3.6.5, “Error Handling
rw*
rw*
rw*
rw*
10
10
2
2
MCWCF14
MCWCP9
MCWCP1
MCWCF1
Memory Map and Registers
rw*
rw*
rw*
rw*
9
1
9
1
MCWCF14
MCWCP8
MCWCP0
MCWCF0
rw*
rw*
rw*
rw*
8
0
8
0
101