cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 75

• Manufacturer Part Number: cx29600
• Description: Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

CX29600
CX29600 Data Sheet
29600-DSH-001-B
2.4.3.14 Line RDI/AIS
2.4.3.15 D4-D12
2.4.3.13 K1, K2
Detect
The APS Channel bytes, K1 and K2, are allocated for APS signaling between line
level entities. K1/K2 carries the values from the TXK1 and TXK2 control
registers. Bits 6, 7, 8 of K2 carry the AIS-L and RDI-L indications.
interrupt (LININT bit 7) is generated when the incoming K1/K2 bytes
consistently differ from the current values for 3 consecutive frames. A Protection
Switching Byte Failure (PSBF) is reported in RXAPS bit 2 if a consistent APS
byte can not be found.
a 111 pattern for 5 consecutive frames. Line AIS is terminated when a non-111
pattern is detected for 5 consecutive frames.
a 110 pattern for 5 consecutive frames. Line RDI is terminated when a non-110
pattern is detected for 5 consecutive frames.
resume normal data transmission, the first valid pointer transmitted is
accompanied by a New Data Flag for one frame.
RDI-L can be generated either automatically or manually. Automatic generation
is the default (TXLIN bit 1 high) and manual generation is set by making TXLIN
bit 2 high. K2 bits 6, 7, 8 contain the AIS-L and RDI-L indications; the contents
are shown in
Table 2-17. K2 Indications
signal is placed in every byte of the frame except for the section overhead
positions. This ensures that an AIS-L is automatically generated in the
downstream data path. Automatic generation of AIS-L can be disabled by writing
bit 7 of DOWNALM low.
contents to be composed of valid section overhead and scrambled all-ones for the
remainder of the frame.
The Line Data Communication Channels (DCC), D4-D12, transmit management
and status information. They are set to 00h as the default. If TXLIN bit 7 is high,
D4-D12 will contain data from either the TxLDCC_D input pin or from the
SI-Bus interface mapped to this STS-3.
RxLDCC_D output pin.
The K1/K2 bytes are latched into the RXK1 and RXK2 registers. A maskable
AIS-L is reported in RXLIN bit 6 when bits 6, 7, and 8 of the K2 byte contain
RDI-L is reported in RXLIN bit 5 when bits 6, 7, and 8 of the K2 byte contain
When the transmitter has stopped transmitting AIS-L or AIS-P and is about to
When an LOS or LOF defect is detected on the incoming signal, an all-ones
AIS-L can be generated by setting TXLIN bit 3 high, causing the frame
The D4-D12 bytes are latched from receive stream and then shifted out to the
InsAIS-L
1
0
0
0
Mindspeed Technologies
Table
InsRDI-L
2-17.
X
1
0
0
AutoRDI-L
X
X
1
0
2.4 SONET/SDH Framer and Overhead Processor
™
111
110 for a minimum of 20 frames.
110 for a minimum of 20 frames upon
detection of LOS, LOF, or AIS-L. From
TXK2 bits 2, 1, 0 when no LOS, LOF, or
AIS-L detected.
From TXK2 bits 2, 1, 0
2.0 Functional Description
K2 bits 6, 7, 8
2-31