cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 23

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cx29600

Manufacturer Part Number
cx29600
Description
Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
CX29600
CX29600 Data Sheet
Figure 1-1. CX29600 Logic Diagram
29600-DSH-001-B
Transmit Section DCC Input
Local Oscillator Reference
Local Oscillator Reference
One-Second Clock Sync
Transmit Line DCC Input
8 kHz Ref. Clock Input
External RC Network
External RC Network
Transmit Frame Input
Transmit Clock Input
External Resistor
Reset
I
I
I
I
I
I
I
I
I
I
I
I
1.5 Logic Diagram
Figure 1-1
general purpose Clock and Control pins. The LIU interface consists of 12 pins.
The Microprocessor interface consists of six clock and control inputs, an 8-bit
data bus, and an 11-bit address bus. There are six JTAG/Scan pins and eight
status pins. The SI-Bus interface consists of 48 transmit pins and 56 receive pins.
There are 95 power and 33 ground pins. Pin descriptions are given in
NOTE:
An asterisk (*) following a pin label indicates that the pin logic level is
active low.
Mindspeed Technologies
OneSecin
Reset*
Ref8KClk
LTxClkin+/–
LTxPFP
LTxPFN
TxFrameIn
TxSDCC_Dat
TxLDCC_Dat
LTxSynRef
ExtRes
RxPLLClk
is a logic diagram of the CX29600’s functional blocks. There are four
The Symbol (*) indicates Active Low
COMMON Elements
I = Input, O = Output
Clock and Control
STS-3 Port
Transmit
TxSDCC_Clk
TxLDCC_Clk
OneSecOUT
TxFrameOut
LTxData+/–
LTxClk+/–
TxTstClk
VGG
O
O
O
O
O
O
O
O
1.0 Product Description
One-Second Output
Transmit Data Output
Transmit Clock Output
Transmit Data Output
Transmit Clock Output
Transmit Data Output
Transmit Clock Output
ESD Protection
1.5 Logic Diagram
Table
1-4.
1-9

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