cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 107
cx29600
Manufacturer Part Number
cx29600
Description
Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29600.pdf
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4.1 Memory Map
The CX29600 memory space consists of 2048 bytes divided into 2 sections as shown in
Table 4-1. Port Register Address Sections
Write operations to reserved addresses should not be performed and reads from reserved addresses produce
undefined results.
of the count values during the read operation.
Section and Path Buffers
from a single read/write address. Each circular buffer is independent of the others. An internal, mod-64 address
counter increments for each read/write operation to a particular circular buffer. Thus, 64 consecutive writes to
the same address fills the buffer and returns to the starting address. The 64-byte J0 and J1 transmit circular
buffers are implemented with a 16-bit wide internal buffer, therefore two writes to the TXSECBUF or
TXPTHBUF registers must be executed before the entire 16-bits is written to the internal buffers.
Reading the section and path buffers 64 consecutive times produces the current contents of the entire buffer and
returns you to the starting address. The mod-64 address counters are set to 0 via reset; otherwise, the read/write
position in the buffer is indeterminate. This does not matter in operation of the trace messages, however, since
they do not have a particular start/end relationship to the SONET/SDH frame structure.
29600-DSH-001-B
Addresses not listed in
Multi-byte registers (primarily counters) should be read least significant byte first to ensure proper latching
The section and path trace circular buffers each consist of 64 bytes arranged as a circular buffer accessible
Table 4-2
4.0 Registers
4
0x000-00D
0x010-170
Address
are currently not defined and should be treated as reserved for future use.
Mindspeed Technologies
General Control/Status Registers
STS-3 Port Control/Status Registers
™
Description
Table
4-1.
4-1
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