cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 166
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cx29600
Manufacturer Part Number
cx29600
Description
Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29600.pdf
(219 pages)
- Current page: 166 of 219
- Download datasheet (3Mb)
4.0 Registers
4.1 Memory Map
TXK1 (Transmit K1 Overhead Control Register)
The TXK1 register controls the K1 byte in the transport overhead. The K1 and K2 bytes are allocated for APS
signaling between line level entities. These bytes are defined only for the first STS-1 of the STS-3c signal.
TXK2 (Transmit K2 Overhead Control Register)
The TXK2 register controls the K2 byte in the transport overhead. The K1 byte and bits 0–5 of the K2 byte are
allocated for APS signaling between line level entities. These bytes are defined only for the first STS-1 of the
STS-3c signal.
STS-3c signal.
4-60
Bits 6–8 of the K2 byte are allocated for AIS and RDI. These bytes are defined only for the first STS-1 of the
7-0
7-0
Bit
Bit
Default
Default
00h
00h
hex address: 0x025
hex address: 0x026
TxK1[1:8]
TxK2[1:8]
Mindspeed Technologies
Name
Name
Transmit value for K1 overhead byte.
Transmit value for K2 overhead byte.
™
Description
Description
CX29600 Data Sheet
29600-DSH-001-B
CX29600
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