emc646sp16ak Emlsi Inc., emc646sp16ak Datasheet - Page 8

• Manufacturer Part Number: emc646sp16ak
• Description: 4mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

Table 2: Bus Operations
Note:
1. CLK must be LOW during async read and async write modes; and to achieve standby power during standby and DPD modes. CLK must be static
(HIGH or LOW) during burst suspend.
2. The WAIT polarity is configured through the bus configuration register (BCR[10]).
3. When LB# and UB# are in select mode (LOW), DQ[15:0] are affected. When only LB# is in select mode, DQ[7:0] are affected. When only UB# is
4. The device will consume active power in this mode whenever addresses are changed.
5. When the device is in standby mode, address inputs and data inputs/outputs are internally isolated from any external influence.
6. V
7. DPD is initiated when CE# transitions from LOW to HIGH after writing RCR[4] to 0. DPD is maintained until CE# transitions from HIGH to LOW.
8. When the BCR is configured for sync mode, sync READ and WRITE, and async READ and WRITE are supported by EMLSI.
9. Burst mode operation is initialized through the bus configuration register (BCR[15]).
10. Initial cycle. Following cycles are the same as BURST CONTINUE. CE# must stay LOW for the equivalent of a single-word burst (as indicated by
WAIT).
in the select mode, DQ[15:8] are affected.
IN
Asynchfonous Mode
Configuration register
Configuration register
Configuration register
Configuration register
= VccQ or 0V; all device pins must be static (unswitched) in order to achieve standby current.
Initial burst write
Initial burst read
Burst continue
Burst suspend
No operation
No operation
Burst Mode
BCR[15]=1
BCR[15]=0
Async write
Async read
Standby
Standby
Read
Write
write
DPD
write
DPD
read
read
Power-down
Power-down
Standby
Standby
Power
Power
Active
Active
Active
Active
Active
Active
Active
Active
Active
Active
Active
Active
Deep
Deep
Idle
Idle
CLK
CLK
X
L
L
L
L
L
L
L
L
L
L
L
L
1
1
ADV# CE#
ADV# CE#
X
X
X
X
X
H
X
X
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
8
OE#
OE#
X
X
X
H
X
X
X
X
X
H
X
H
H
X
L
L
L
L
WE#
WE#
H
H
H
H
X
X
H
L
X
X
L
X
L
X
X
L
L
X
CRE
CRE
H
H
X
X
X
H
H
X
L
L
L
L
L
L
L
L
L
L
UB#/
UB#/
LB#
LB#
L
L
X
X
X
L
X
L
L
X
X
L
X
L
X
X
L
X
EMC646SP16AK
WAIT
High-z
High-z
WAIT
High-z
High-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
Low-z
4Mx16 CellularRAM
2
2
Data out or
DQ[15:0]
DQ[15:0]
Data out
Data out
Reg.out
Reg.out
Data in
Config.
Data in
Data in
Config.
High-z
High-z
High-z
High-z
High-z
High-z
High-z
X
X
X
X
3
3
Note
Note
9, 10
9, 10
5, 6
4, 6
4, 8
5, 6
4, 6
4, 9
4, 9
4, 9
4, 9
4
4
7
4
7