emc646sp16ak Emlsi Inc., emc646sp16ak Datasheet - Page 28

• Manufacturer Part Number: emc646sp16ak
• Description: 4mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

Partial Array Refresh (RCR[2:0] Default = Full Array Refresh
The PAR bits restrict refresh operation to a portion of the total memory array. This feature allows the device to reduce standby current
by refreshing only that part of the memory array required by the host system. The refresh options are full array, one-half array, one-
quarter array, one-eighth array, or none of the array. The mapping of these partitions can start at either the beginning or the end of the
address map.
Table 7: Address Patterns for PAR (RCR[4] = 1)
Deep Power-Down (RCR[4]) Default = DPD Disabled
The deep power-down bit enables and disables all refresh-related activity. This mode is used if the system does not require the storage
provided by the CellularRAM device. Any stored data will become corrupted when DPD is enabled. When refresh activity has been re-
enabled, the CellularRAM device will require 150µs to perform an initialization procedure before normal operations can resume. Deep
power-down is enabled by setting RCR[4] = 0 and taking CE# HIGH. DPD can be enabled using CRE or the software sequence to
access the RCR. Taking CE# LOW for at least 10µs disables DPD and sets RCR[4] = 1; it is not necessary to write to the RCR to
disable DPD. BCR and RCR values (other than RCR[4]) are preserved during DPD.
Page Mode Operation (RCR[7]) Default = Disabled
The page mode operation bit determines whether page mode is enabled for asynchronous READ operations. In the power-up default
state, page mode is disabled.
Device Identification Register
The DIDR provides information on the device manufacturer, CellularRAM generation, and the specific device configuration. Table 8
describes the bit fields in the DIDR. This register is read-only. The DIDR is accessed with CRE HIGH and A[19:18] = 01b, or through
the register access software sequence with DQ = 0002h on the third cycle.
Table 8: Device Identification Register Mapping
Bit Field
Options
RCR[2]
name
Field
0
0
0
0
1
1
1
1
128words
RCR[1]
Length
0
0
1
1
0
0
1
1
Row Length
DIDR[15]
RCR[0]
Setting
0
1
0
1
0
1
0
1
Bit
0b
Version
One-quarter of die
One-quarter of die
One-eighth of die
One-eighth of die
2nd
Device version
Active Section
One-half of die
DIDR[14:11]
One-half die
None of die
Full Die
Setting
0001b
Bit
Density
64Mb
Device density
000000h-3FFFFFh
000000h-1FFFFFh
000000h-0FFFFFh
200000h-3FFFFFh
300000h-3FFFFFh
380000h-3FFFFFh
000000h-07FFFFh
DIDR[10:8]
Address Space
28
Setting
0
010b
Bit
Generatio
CR 1.5
n
CellularRAM
generation
DIDR[7:5]
4 Meg x 16
2 Meg x 16
1 Meg x 16
0 Meg x 16
2 Meg x 16
1 Meg x 16
512 K x 16
512 K x 16
EMC646SP16AK
Size
Setting
010b
Bit
4Mx16 CellularRAM
EMLSI
Vendor
Vendor ID
DIDR[4:0]
Density
64Mb
32Mb
16Mb
32Mb
16Mb
8Mb
0Mb
8Mb
01010b
Setting
Bit