emc646sp16ak Emlsi Inc., emc646sp16ak Datasheet - Page 14

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emc646sp16ak

Manufacturer Part Number
emc646sp16ak
Description
4mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
is limited by refresh considerations. CE# must not stay LOW longer than t
longer than t
Figure 8: Refresh Collision During Variable-Latency READ Operation
Note:
Non-default BCR settings for refresh collision during variable-latency READ operation: Latency code 2 (3 clocks); WAIT active LOW; WAIT asserted
during delay.
LB#/UB#
DQ[15:0]
A[21:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
CEM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
OH
OL
, CE# should be taken HIGH and the burst restarted with a new CE# LOW / ADV# LOW cycle.
Additional WAIT states inserted to allow refresh completion
High-Z
Address
Valid
14
CEM
. If a burst suspension will cause CE# to remain LOW for
D0
D1
EMC646SP16AK
D2
Don’t Care
4Mx16 CellularRAM
D3
Undefined

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