m52s128168a-7tig Elite Semiconductor Memory Technology Inc., m52s128168a-7tig Datasheet - Page 13

• Manufacturer Part Number: m52s128168a-7tig
• Description: 2m X 16 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
Precharge
each bank respectively or all banks simultaneously. The bank select addresses (BA0, BA1) are used to define which bank is
precharged when the command is initiated. For write cycle, t
After t
NOP & Device Deselect
control inputs. The Mobile DDR SDRAM is put in NOP mode when CS is actived and by deactivating RAS , CAS and WE .
For both Deselect and NOP, the device should finish the current operation when this command is issued.
Elite Semiconductor Memory Technology Inc.
RAS and WE are low and CAS is high at the rising edge of the clock. The precharge command can be used to precharge
The precharge command is used to precharge or close a bank that has activated. The precharge command is issued when CS ,
The device should be deselected by deactivating the CS signal. In this mode, Mobile DDR SDRAM should ignore all the
RP
from the precharge, an active command to the same bank can be initiated.
A10/AP
0
0
0
0
1
Burst Selection for Precharge by Bank address bits
Preliminary
BA1
0
0
1
1
X
WR
(min.) must be satisfied until the precharge command can be issued.
BA0
X
0
1
0
1
Revision : 1.4
Publication Date : Sep. 2008
Bank B Only
Bank C Only
Bank D Only
Bank A Only
Precharge
All Banks
M53D128168A
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