m52s128168a-7tig Elite Semiconductor Memory Technology Inc., m52s128168a-7tig Datasheet - Page 12

• Manufacturer Part Number: m52s128168a-7tig
• Description: 2m X 16 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
Extended Mode Register Set (EMRS)
The extended mode register stores for selecting PASR and DS. The extended mode register set must be done before any active
command after the power up sequence. The extended mode register is written by asserting low on CS , RAS , CAS , WE and
high on BA1,low on BA0(The Mobile DDR SDRAM should be in all bank precharge with CKE already high prior to writing into the
extended more register). The state of address pins A0~An in the same cycle as CS , RAS , CAS , WE going low is written in
the extended mode register. Refer to the table for specific codes.
The extended mode register can be changed by using the same command and clock cycle requirements during operations as long
as all banks are in the idle state. The default value extended mode register is defined as half driving strength and all banks
refreshed.
Internal Temperature Compensated Self Refresh (TCSR)
1.
2.
3.
BA1 BA0 A11 A10 A9 A8 A7
* RFU should stay “0” during EMRS cycle
Elite Semiconductor Memory Technology Inc.
1
In order to save power consumption, Mobile DDR SDRAM includes the internal temperature sensor and control units to control
the self refresh cycle automatically according to the three temperature range : 15°C, 45°C, 70°C and 85°C.
If the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored.
It has +/-5°C tolerance
0
0
0
0
0
0
A6
DS
Preliminary
A5 A4
RFU*
A3
A2 A1 A0
PASR
Internal TCSR
DS
PASR
Address bus
Extended Mode Register Set
A2-A0
A6-A5
000
001
010
100
101
011
111
00
01
10
11
Revision : 1.4
Publication Date : Sep. 2008
(BankA& BankB) or (BA1=0)
(BankA) or (BA0=BA1=0)
Self Refresh Coverage
Driver Strength
Remark R : Reserved
M53D128168A
Full Strength
1/2 Strength
1/4 Strength
2 Bank
1 Bank
4Bank
R
R
R
R
R
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