ace1202 Fairchild Semiconductor, ace1202 Datasheet - Page 27
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ace1202
Manufacturer Part Number
ace1202
Description
Arithmetic Controller Engine Acex ?for Low Power Applications
Manufacturer
Fairchild Semiconductor
Datasheet
1.ACE1202.pdf
(39 pages)
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ACE1202 Product Family Rev. B.1
OCFLAG
TXBUSY
ShiftCLK
CLOCK
G2/G5
Output
IR/RF
Condition:
BPSEL = 0x12 [ "1", " 0 " = 3 * IR/RF Clocks]
DAT0 = 0x52
No. bit to encode = 8 (HBCNTRL = XXXX0111b)
DAT0
Bit 7
OCFLAG
TXBUSY
CLOCK
ShiftCLK
G2/G5
Output
IR/RF
Conditions:
BPSEL = 0x12 [ "1", " 0 " = 3 * IR/RF Clocks]
DAT0 = 0x52 , 0x92
No. bit to encode = 8 (HBCNTRL = XXXX0111b)
DAT0
Bit 7
SYNC
Period
"0"
SYNC
Period
"0"
"0"
"1"
"0"
"0"
"1" "0"
"1"
"0"
"1"
"0"
"0"
¡
"1"
Software must set the START bit while OCFLAG is set in
order to send another message without introducing a delay.
"1"
"0"
"0"
"0"
"1"
"0"
"0"
"0"
"1"
"0"
"1"
STOP bit clear,
transmission ends.
www.fairchildsemi.com
"0"