dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 71

• Manufacturer Part Number: dspic33fj128gp204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

5.0
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04 and dsPIC33FJ128GPX02/X04 devices contain
internal Flash program memory for storing and
executing application code. The memory is readable,
writable and erasable during normal operation over the
entire V
Flash memory can be programmed in two ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
ICSP
dsPIC33FJ64GPX02/X04 and dsPIC33FJ128GPX02/
X04 device to be serially programmed while in the end
application circuit. This is done with two lines for pro-
gramming clock and programming data (one of the
alternate programming pin pairs: PGECx/PGEDx), and
three other lines for power (V
Master Clear (MCLR). This allows customers to manu-
facture boards with unprogrammed devices and then
FIGURE 5-1:
© 2009 Microchip Technology Inc.
Note:
programming capability
DD
FLASH PROGRAM MEMORY
allows
range.
This data sheet summarizes the features
of
dsPIC33FJ64GPX02/X04
dsPIC33FJ128GPX02/X04
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
the “dsPIC33F Family Reference Manual”,
“Section
(DS70191), which is available from the
Microchip website (www.microchip.com).
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
the
a
ADDRESSING FOR TABLE REGISTERS
5.
dsPIC33FJ32GP302/304,
dsPIC33FJ32GP302/304,
Flash
DD
), ground (V
1/0
Programming”
0
families
TBLPAG Reg
8 bits
SS
) and
and
Preliminary
of
Program Counter
24-bit EA
24 bits
program the digital signal controller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
application can write program memory data either in
blocks or ‘rows’ of 64 instructions (192 bytes) at a time
or a single program memory word, and erase program
memory in blocks or ‘pages’ of 512 instructions (1536
bytes) at a time.
5.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits <7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 5-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits <15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits <23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70292C-page 69