dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 139

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dspic33fj128gp204

Manufacturer Part Number
dspic33fj128gp204
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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9.0
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04 and dsPIC33FJ128GPX02/X04 oscillator system
provides:
• External and internal oscillator options as clock
FIGURE 9-1:
© 2009 Microchip Technology Inc.
SOSCO
SOSCI
Note:
sources
Note 1:
R
(2)
2:
OSCILLATOR
CONFIGURATION
OSC1
OSC2
Secondary Oscillator
This data sheet summarizes the features
of
dsPIC33FJ64GPX02/X04
dsPIC33FJ128GPX02/X04
devices. It is not intended to be a
comprehensive
complement the information in this data
sheet, refer to the “dsPIC33F Family
Reference
Oscillator (Part III)” (DS70216), which is
available from the Microchip website
(www.microchip.com).
See Figure 9-2 for PLL details.
If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
Primary Oscillator
Oscillator
TUN<5:0>
FRC
POSCMD<1:0>
the
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04 AND dsPIC33FJ128GPX02/
X04 OSCILLATOR SYSTEM DIAGRAM
LPOSCEN
Manual”,
Oscillator
LPRC
dsPIC33FJ32GP302/304,
Auxiliary Oscillator
reference
POSCCLK
S1
÷ 16
S3
“Section
families
source.
FRCDIV<2:0>
AOSCMD<1:0>
AOSCCLK
and
39.
Preliminary
To
POSCCLK
of
PLL
ASRCSEL
XTPLL, HSPLL,
ECPLL, FRCPLL
• An on-chip Phase-Locked Loop (PLL) to scale the
• An internal FRC oscillator that can also be used
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
• An auxiliary crystal oscillator for Audio DAC
A simplified diagram of the oscillator system is shown
in Figure 9-1.
F
VCO
Clock Fail
internal operating frequency to the required
system clock frequency
with the PLL, thereby allowing full-speed
operation without any external clock generation
hardware
savings
clock failure and takes fail-safe measures
selection.
S7
XT, HS, EC
(1)
FRCDIV16
FRCDIVN
SOSC
F
LPRC
FRC
VCO (1)
SELACK
Clock Switch
NOSC<2:0> FNOSC<2:0>
S1/S3
S7
S0
S5
S4
S2
S6
÷ 2
Reset
APSTSCLR<2:0>
DOZE<2:0>
÷ N
DS70292C-page 137
ACLK
WDT, PWRT,
Timer1
FSCM
DAC
F
F
F
OSC
P
CY

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